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Hi, I am using Aurix TC375 Lite Kit development board and tried the freeRtos example code.

But after compilation, once the code is put in the debugger mode then the tsim issue comes as below snapshot --

Please get me a solution for this issue asap.

Thanks.

I am running bldc motor with the help of hall sensor but not able to get full no load speed.This motor has 1000 rpm but getting only upto 3500 rpm.

I am using example code to drive this motor whether this code support 10000 rmp.

My motor is working at 48v,750 W.Could you help to resolve this problem 

We currently have an application which streams a 720x720 video stream at 30fps in YUV format (2 bytes per pixel). We are using a USB high speed interface (no superspeed available), which is close to the practical limit of this stream. Occasionally, we get error 71 (CY_U3P_ERROR_INVALID_SEQUENCE) from CyU3PDmaMultiChannelCommitBuffer. It seems like this happens if the USB bus is busy due to high load. If this happens, I would like to drop the current frame, by resetting the GPIF state machine and not send any more packets for the current frame. This is my code:

void cameraDmaCallback(
    CyU3PDmaMultiChannel* chHandle,
    CyU3PDmaCbType_t      type,
    CyU3PDmaCBInput_t*    input)
{
    (void)input;

    CyU3PDmaBuffer_t    DmaBuffer;
    CyU3PReturnStatus_t status = CY_U3P_SUCCESS;

    if (type == CY_U3P_DMA_CB_PROD_EVENT)
    {
        if (sIsStartOfFrame)
        {
            sDmaDoneCount = 0;
        }

        status =
            CyU3PDmaMultiChannelGetBuffer(chHandle, &DmaBuffer, CYU3P_NO_WAIT);
        while (status == CY_U3P_SUCCESS)
        {
            /* Add Headers*/
            if (DmaBuffer.count < sUvcDataBufferSize)
            {
                uvcAddHeader(
                    (DmaBuffer.buffer - ES_UVC_PROD_HEADER), ES_UVC_HEADER_EOF);
                sHitFv = CyTrue;
            }
            else
            {
                uvcAddHeader(
                    (DmaBuffer.buffer - ES_UVC_PROD_HEADER),
                    ES_UVC_HEADER_FRAME);
            }

            /* Commit Buffer to USB*/
            status = CyU3PDmaMultiChannelCommitBuffer(
                chHandle, (DmaBuffer.count + 12), 0);
            if (status != CY_U3P_SUCCESS)
            {
                sIsStartOfFrame = CyTrue;
                sHitFv          = CyFalse;
                sActiveSocket ^= 1;

                if (sActiveSocket)
                {
                    CyU3PGpifSMSwitch(
                        ES_UVC_INVALID_GPIF_STATE,
                        CX3_START_SCK1,
                        ES_UVC_INVALID_GPIF_STATE,
                        ALPHA_CX3_START_SCK1,
                        ES_UVC_GPIF_SWITCH_TIMEOUT);
                }
                else
                {
                    CyU3PGpifSMSwitch(
                        ES_UVC_INVALID_GPIF_STATE,
                        CX3_START_SCK0,
                        ES_UVC_INVALID_GPIF_STATE,
                        ALPHA_CX3_START_SCK0,
                        ES_UVC_GPIF_SWITCH_TIMEOUT);
                }

                CyU3PEventSet(
                    &sUsbCameraEvent, USB_COMMIT_FAIL_EVENT_FLAG, CYU3P_EVENT_OR);
                return;
            }

            sIsStartOfFrame = CyFalse;
            sDmaDoneCount++;
            sActiveSocket ^= 1; /* Toggle the Active Socket */
            status = CyU3PDmaMultiChannelGetBuffer(
                chHandle, &DmaBuffer, CYU3P_NO_WAIT);
        }
    }
    else if (type == CY_U3P_DMA_CB_CONS_EVENT)
    {
        sDmaDoneCount--;

        // Frame done
        if ((sHitFv == CyTrue) && (sDmaDoneCount == 0))
        {
            sHitFv          = CyFalse;
            sIsStartOfFrame = CyTrue;

            if (sActiveSocket)
            {
                CyU3PGpifSMSwitch(
                    ES_UVC_INVALID_GPIF_STATE,
                    CX3_START_SCK1,
                    ES_UVC_INVALID_GPIF_STATE,
                    ALPHA_CX3_START_SCK1,
                    ES_UVC_GPIF_SWITCH_TIMEOUT);
            }
            else
            {
                CyU3PGpifSMSwitch(
                    ES_UVC_INVALID_GPIF_STATE,
                    CX3_START_SCK0,
                    ES_UVC_INVALID_GPIF_STATE,
                    ALPHA_CX3_START_SCK0,
                    ES_UVC_GPIF_SWITCH_TIMEOUT);
            }
        }
    }
}

This seems to work sometimes, but not all of the time. In the times that it doesn't work, the end of frame seems to never happen. Are there additional things I need to do to restart at the next start of frame, either related to the GPIF, or the DMA?

I am reviewing an old design for a spectral lamp power supply.  Spectral lamps are a type of arc lamp that are rated 10W to 60W at 1A, made by Osram.   The power supply, is traditionally 50Hz mains choke and a florescent tube starter.  Spectral lamps do not have a heater but start with a voltage of less than 1,500V briefly, then run at high voltage vaporising a metal or causing a gas to ionise flouress.

I developed a switch mode power supply 30 years ago which ran well the lamps' life went way beyond what was expected of it and the quality of the light was much better because there was virtually no flicker, so it was used with electronic devices.   But the transistor and inductor losses were higher than would be possible now with a zero current or zero voltage switching controller.   There was no power factor correction, and the power supply only operated with 230Vac, though it would run at much lower voltage with the lower power lamps.

XDPS2201 seems to run with a variable PWM and current mode, similarly to the circuit I have drafted on my blog.   I believe this part would run similarly to UC3806 in my blog.

https://blog.andrew-lohmann.me.uk/2018/07/electronics-high-frequency-arc-lamp.html

I am also considering high frequency fluorescent tube ballast's and using variable frequency for lamp current regulation.  I have drafted a design using chokes rather than chokes and a transformer.  The arc would be struck with L1 C12 at about 28KHz.  Then run at 128KHz or higher when L2 C12 resonate.   I have not worked these out properly, but the circuit could output a higher voltage than the incoming voltage, which I have modelled a little on the blog.

https://drive.google.com/file/d/1wPdIDxCzWKhlYY9-XM0649uTIHABm-Ua/view?usp=sharing

My question is am I on the right track by considering this controller?

I am now using the ESP32 to stream the raw radar data from  XENSIV™ BGT60TR13C radar wing board (SP005568071)  through UDP. For each chirp in the radar setting, I have 128 ADC samples.  But I found that there was always a noise at a fixed frequency as shown in the attached figure.  I tried to change the sampling frequency but this noise was still there. Do you know what caused this issue?

Thank you!

BGT60TR13C 

Hi, I can't add any printf or can't use UART from sample Ethernet application

if I add anything there it is crashing

I need to process data after receiving from Ethernet but if I try to do anything application just crash. So how and where to process Ethernet data. 

Hi 
I am studying the Device Firmware Upgrade code
I can change the code and make it run the FW upgrade via UART by modifying the common.mk, 

and I noted the differences when I used the original sample with the I2C interface, when the upgrade process is done, the PSoC6 cam restart/reboot. and running the cm4 code

but when I changed the interface to UART. it seems to upgrade successfully, but the EVK doesn't reboot

is there anything else I need to change besides the 

please advise

Thanks

Hello,

Does anyone develop a bulk loop transfer between CY7C68013 FX2LP circuit and Labview interface on Usb full speed ?

Thanks

Stéphane

Hi, over the past week I was trying to write the flash memory of my psoc 6 using System Calls, more specifically using the Write Row System Call.

Looking into the datasheet:

To write a row, the SRAM_SCATCH_ADDR should be written in the IPC_STRUCT and in that addres, there has to be essentially the OPCODE, followed by the integrity check, followed by the flash addr to write, followed by all the data to write in that row (SRAM_SCATCH_ADDR + 0x0C + n*0x04 = Data word n)

However, I think this is not correct, in the   SRAM_SCATCH_ADDR + 0x0C, there should be the address of where the data to write is located, in the case of my psoc, it has to be a pointer to a 512 byte long array that contains the data to write in the row.

Hope this helps.

Link to datasheet: PSoC 6 MCU: CY8C61x4, CY8C62x4 Architecture Technical Reference Manual (TRM) PSoC 61, PSoC 62 MCU (infineon.com)

Link to example where I found the error: PSoC-6-MCU-Device-Related-Design/Memory/CE220120 - PSoC 6 MCU Blocking Mode Flash Write/CE220120_Blocking_Mode_Flash_Write.cydsn/main_cm4.c at master · Infineon/PSoC-6-MCU-Device-Related-Design · GitHub