Banner_AURIX_Security-Solution Banner_AURIX_Safety_Products ShieldBuddy TC275 Banner_AURIX_OnzerOS


infineon4engi@twitter twitter

infineon4engineers Facebook

infineon@linkedin linkedin

infineon@youtube youtube


+ Post New Thread
Page 5 of 40 FirstFirst 1 2 3 4 5 6 7 8 9 15 ... LastLast
Threads 81 to 100 of 797

Forum: Aurix Forum

  1. Sticky Thread Sticky: Quick Training for AURIX™

    Here you can find a Quick Training for AURIX™ (entry-level): ...

    Started by triki‎, Aug 6th, 2019 08:35 AM
    • Replies: 0
    • Views: 1,511
    Aug 6th, 2019, 08:35 AM Go to last post
  1. ESR1 edge is not generating a NMI Trap

    Hi, I want to generate an NMI trap on a falling edge at the ESR1 pin (ESRCFG1.EDCON = 2), but the trap doesn’t occur. Does something else need to...

    Started by Lucas‎, Oct 28th, 2019 11:23 AM
    • Replies: 1
    • Views: 73
    Oct 28th, 2019, 01:17 PM Go to last post
  2. What is BIFACES and how to use it?

    Hi all, could you please explain what is BIFACES and how to use it? Thanks! Lucas #8042000 12172

    Started by Lucas‎, Oct 28th, 2019 11:22 AM
    • Replies: 1
    • Views: 89
    Oct 28th, 2019, 01:16 PM Go to last post
  3. Can Traps be disabled in AURIX like interrupts?

    Hi all, Can I disable a specific trap in AURIX? Thanks and regards Christine #8042000 12520

    Started by Christine‎, Oct 28th, 2019 11:19 AM
    • Replies: 1
    • Views: 63
    Oct 28th, 2019, 01:14 PM Go to last post
  4. Interrupt response time

    Hi all, How much does it take IR response time? Could you please let me know the response time of IR(Min, Max)? And please let me know the...

    Started by Christine‎, Oct 28th, 2019 11:16 AM
    • Replies: 1
    • Views: 56
    Oct 28th, 2019, 01:12 PM Go to last post
  5. Unused Flash - Fill recommendations?

    Hi AURIX Community, Is there a recommendation as to how to fill unused flash locations so that a trap is generated if code is executed from those...

    Started by Christine‎, Oct 28th, 2019 11:14 AM
    • Replies: 1
    • Views: 65
    Oct 28th, 2019, 01:11 PM Go to last post
  6. What is Program cached & non-cached access in AURIX?

    Hi all, I wonder what is Program cached & non-cached access in AURIX? Thank you for your replies and regards, Christine #8042000 12126

    Started by Christine‎, Oct 28th, 2019 11:12 AM
    • Replies: 1
    • Views: 75
    Oct 28th, 2019, 01:10 PM Go to last post
  7. AURIX EVR13 Switching frequency

    Hi all, We want to reduce EMC/EMI on application TC2xx, what is default value of AURIX EVR13 Switching frequency and can we configure this? ...

    Started by Christine‎, Oct 28th, 2019 11:10 AM
    • Replies: 1
    • Views: 62
    Oct 28th, 2019, 01:08 PM Go to last post
  8. Why isn't my interrupt happening?

    Hello, I have a peripheral configured to cause a service request that I have routed to a CPU interrupt, but the interrupt is not happening - Do...

    Started by Lucas‎, Oct 28th, 2019 07:01 AM
    • Replies: 1
    • Views: 91
    Oct 28th, 2019, 11:07 AM Go to last post
  9. Is Cache Coherency covered in Hardware?

    Hi all, Does AURIX have a cache coherency mechanism in hardware that ensures cache coherency between different core caches? Thank you and best...

    Started by Lucas‎, Oct 28th, 2019 06:46 AM
    • Replies: 1
    • Views: 65
    Oct 28th, 2019, 11:06 AM Go to last post
  10. How to calculate BMHD CRC on PC?

    Hi, before flashing a BMHD into AURIX, I want to be sure, that I use the correct CRC values inside BMHD. How do I calculate the CRC for a BMHD in...

    Started by Lucas‎, Oct 28th, 2019 06:44 AM
    • Replies: 1
    • Views: 68
    Oct 28th, 2019, 11:04 AM Go to last post
  11. Aurix Documentation Navigation

    Hi all, I have a generic question: There are different documents provided online or in myICP Customer Documentation for AURIX TC2xx to learn...

    Started by Lucas‎, Oct 28th, 2019 06:42 AM
    • Replies: 1
    • Views: 58
    Oct 28th, 2019, 11:03 AM Go to last post
  12. How can a noclear SRAM (SRAM content persistent over reset) be implemented?

    Hi, How can a noclear SRAM be implemented meaning SRAM content persistency over Reset in AURIX TC2xx/TC3xx? Thank you. Regards B.

    Started by Bernie‎, Oct 28th, 2019 07:15 AM
    • Replies: 1
    • Views: 83
    Oct 28th, 2019, 11:01 AM Go to last post
  13. How much is the SAR ADC result higher than Vref or lower than GND?

    Hi all, Is input voltage lower than 0V is converted to the same as 0V by SAR Analog-Digital Converter (ADC)? And how about higher than Vref? ...

    Started by Bernie‎, Oct 28th, 2019 07:13 AM
    • Replies: 1
    • Views: 76
    Oct 28th, 2019, 10:59 AM Go to last post
  14. Were can I find the TriBoard drivers?

    Hi Community, My computer is not recognizing the TriBoard Starter Kit when I connect the micro USB cable. I cannot program it using MemTool or...

    Started by Bernie‎, Oct 28th, 2019 07:06 AM
    • Replies: 1
    • Views: 71
    Oct 28th, 2019, 10:58 AM Go to last post
  15. Why does my program run slowly from PFLASH?

    Hello, Why does my program execute much faster from RAM than from PFLASH? Thank you. Regards Bernie

    Started by Bernie‎, Oct 28th, 2019 07:04 AM
    • Replies: 1
    • Views: 62
    Oct 28th, 2019, 10:57 AM Go to last post
  16. Can I supply the AURIX with a single 5V/3V rail?

    Hi all, Can I supply the AURIX TC2xx/TC3xx with a single 5V/3V rail? Thank you and regards Christine #8042000 12519

    Started by Christine‎, Oct 28th, 2019 06:38 AM
    • Replies: 1
    • Views: 48
    Oct 28th, 2019, 10:55 AM Go to last post
  17. Will reset state be released & MCU jumps to user SW when ESR0 pin is effectively low?

    Hi all, will the reset state be released and the MCU TC2XX/TC3XX jumps to the user SW when ESR0 pin is effectively low? Thank you! Regards...

    Started by Christine‎, Oct 28th, 2019 06:36 AM
    • Replies: 1
    • Views: 48
    Oct 28th, 2019, 10:54 AM Go to last post
  18. How can you initialize the RAM prior to usage?

    Hi AURIX Community, How can you initialize the TC2XX RAM prior to usage? Thank you and regards Christine #8042000 12262

    Started by Christine‎, Oct 28th, 2019 06:33 AM
    • Replies: 1
    • Views: 57
    Oct 28th, 2019, 10:52 AM Go to last post
  19. How to cause a software reset on AURIX?

    Hi all, could you please help me with the following: To cause a software reset on AURIX while executing code from CPU0 I am writing a 0 to the...

    Started by Bernie‎, Oct 23rd, 2019 08:18 AM
    • Replies: 1
    • Views: 174
    Oct 28th, 2019, 06:30 AM Go to last post
  20. How many methods setting lock / unlock Tricore debug interface and How to ?

    Hi all, could you please let me know how many methods for locking/unlocking the TriCore debug interface are there and how can they be used? ...

    Started by Bernie‎, Oct 23rd, 2019 08:16 AM
    • Replies: 1
    • Views: 124
    Oct 28th, 2019, 06:29 AM Go to last post

Forum Information and Options

Moderators of this Forum

Thread Display Options

Use this control to limit the display of threads to those newer than the specified time frame.

Allows you to choose the data by which the thread list will be sorted.

Order threads in...

Note: when sorting by date, 'descending order' will show the newest results first.

Icon Legend

Contains unread posts
Contains unread posts
Contains no unread posts
Contains no unread posts
More than 15 replies or 150 views
Hot thread with unread posts
More than 15 replies or 150 views
Hot thread with no unread posts
Closed Thread
Thread is closed
Thread Contains a Message Written By You
You have posted in this thread
Disclaimer

All content and materials on this site are provided “as is“. Infineon makes no warranties or representations with regard to this content and these materials of any kind, whether express or implied, including without limitation, warranties or representations of merchantability, fitness for a particular purpose, title and non-infringement of any third party intellectual property right. No license, whether express or implied, is granted by Infineon. Use of the information on this site may require a license from a third party, or a license from Infineon.


Infineon accepts no liability for the content and materials on this site being accurate, complete or up- to-date or for the contents of external links. Infineon distances itself expressly from the contents of the linked pages, over the structure of which Infineon has no control.


Content on this site may contain or be subject to specific guidelines or limitations on use. All postings and use of the content on this site are subject to the Usage Terms of the site; third parties using this content agree to abide by any limitations or guidelines and to comply with the Usage Terms of this site. Infineon reserves the right to make corrections, deletions, modifications, enhancements, improvements and other changes to the content and materials, its products, programs and services at any time or to move or discontinue any content, products, programs, or services without notice.