AURIX™ Forum Discussions
in TC38x,Can the local memory unit(LMU) and thre Distributed LMU (DLMU) as a whole LMU to be used in OVC function SAL-TC387QP-160F300S AD
Show Less你好
目前使用"UART_VCOM_1_KIT_TC397_TFT"範例在Triboard TC397上進行測試。
開啟兩組ASCLIN 模組0跟模組4並且在中斷設置中有更改相對應的向量表數值,進行以下交互測試:
1. CPU0_Main.c內執行兩組ASCLIN初始化、只有調整"中斷向量表數值(0)"跟進行輸出"Hello World!" ==> 可以正常顯示
2. CPU1_Main.c內執行兩組ASCLIN初始化、只有調整"中斷向量表數值(1)"跟進行輸出"Hello World!" ==> 無法顯示
3. CPU2_Main.c內執行兩組ASCLIN初始化、只有調整"中斷向量表數值(2)"跟進行輸出"Hello World!" ==> 可以正常顯示
4. CPU3_Main.c內執行兩組ASCLIN初始化、只有調整"中斷向量表數值(3)"跟進行輸出"Hello World!" ==> 可以正常顯示
想請問為何在CPU1_Main.c會有此問題?
#AURIX
#Tricore
Show Less
when try to debug the example project through miniwiggler, it can not work as below:
but memtool can connect the chip :
MCD basic client can also connect the chip and get the information:
the ADS version is 1.9.20 ,DAS version is 8.0, miniwiggler is V3.1, hardware board is designed by other people and can be connected through UDE/pls
Show Less
Hi All,
I have a question related to SCR_XRam and SCR_IRam.
The question: How to know whether the SCR_XRam and SCR_IRam are initialized or are not initialized in startup code?
Thanks.
Show LessAs metioned in "AURIX TC3xx Safety Manual v2.0.pdf - 6.38 SM[HW]:CLOCK:CFG_AS_AP", Registers of Clock System is protected by Master Tag based safety machenism. But I can't find related ACCEN0/1 register in "Infineon-AURIX_TC3xx_Part1-UserManual-v02_00-EN.pdf - 10 Clocking System".
Show LessI am trying to configure an Infineon Aurix TC334 Lite kit QSPI as master. So far, I managed to configure the necessary pins, change the polarity to work with Gyro 6 Click Gyroscope (bit order - MSB, sampling edge - riging). I using an SPI sniffler and as far as i can see data is being transmitted but i receive nothing on MISO. Do you have any idea?
I've attached a snip with the SPI MOSI/MISO and the code as well.
Show Less
Hello Infineon Community,
We are unable to identify the MAC-ID of Infineon Aurix Tc397xx having transceiver ID as RTL8211F with connected RJ45 cable controller to the Canoe for my project activities.
Please help in this regard how to connect the MAC-ID of the specific chi set to Canoe
Thanks in advance
Show LessHello, I would like to know what are TSN standards does the Aurix TC399 microcontroller supports?
Hi,
I am currently working on sending and receiving frames on the Aurix TC397, I managed to send BUT the interrupt for "transmissionCompletedEnabled" does not seem to work.
I have received the frame inside my RX FIFO0 but the interrupt RX does not work either.
And because I am not doing the interrupt I can't read what's inside my FIFO.
In my config, I have the right flag enable :
- "transmissionCompletedEnabled" for TX
- "rxFifo0NewMessageEnabled" for RX
There are indeed enabled I had checked them on the CPU registers.
Here is my interrupt config for TX :
g_mcmcan.canNodeConfig.interruptConfig.transmissionCompletedEnabled = TRUE;
g_mcmcan.canNodeConfig.interruptConfig.traco.priority = ISR_PRIORITY_CAN_TX;
g_mcmcan.canNodeConfig.interruptConfig.traco.interruptLine = IfxCan_InterruptLine_2;
g_mcmcan.canNodeConfig.interruptConfig.traco.typeOfService = IfxSrc_Tos_cpu0;
Here is my interrupt config for RX FIFO0 :
g_mcmcan.canNodeConfig.interruptConfig.rxFifo0NewMessageEnabled = TRUE;
g_mcmcan.canNodeConfig.interruptConfig.rxf0f.priority = ISR_PRIORITY_CAN_RX;
g_mcmcan.canNodeConfig.interruptConfig.rxf0f.interruptLine = IfxCan_InterruptLine_1;
g_mcmcan.canNodeConfig.interruptConfig.rxf0f.typeOfService = IfxSrc_Tos_cpu0;
I don't know where to look to find a solution to this problem.
Thanks,
Hi, experts.
When debugging Infineon example "Flash_Programming_1_KIT_TC334_LK ", I found that when I used the default parameters, Flash can be erased normally, but when I changed the initial address of erase from 0xA00E0000 to 0x80080020, I found that the erase seemed to fail. when I changed the initial address of erase from 0xA00E0000 to 0x80080020, I found that the erase seemed to fail, I think it may be caused by the macro definition "#define RELOCATION_START_ADDR (0x70100000U) ", please tell me what this macro definition means, and how to solve the problem here, thank you!
smartconx_target@Q!w2e3r4t5y6u7i8o9p0||/t5/AURIX/The-Infineon-example-quot-Flash-Programming-1-KIT-TC334-LK-quot-failed-to-erase/td-p/723792
Show Less