AURIX™ Forum Discussions

Hi,

I  want to configure my UART module  

TX should happen with 10US that i have configured with GPT ,

RX should happen with Interrupt based. 

same when i tested RX got struck in IfxStm_isDeadLine(inline) function.

I want to know why it is getting strucked

Hi everyone,
I started working with Linker scripts and startup code that comes in the demo, but I can't find a reference/ manual that will documents the scripting language used in the LSL files mainly the HighTech one. 

Can anyone please point me towards it? 

And I want to know what does a FLAGS(z) mean I can't find any answer to what this "z" flag do. 

Thank You.

Im using tc377 for uart communication, I have to send data from tx  without interrupt by using Timer(Gpt12)
when i using this Data is stored in Tx buffer but not transmitting to Rx. 

This is timer function
void interruptGpt12_T3(void)
{
IfxCpu_disableInterrupts();
IfxPort_togglePin(LED);
if(g_flag1 == 1)
{

send_receive_ASCLIN_UART_message();
}

IfxGpt12_T3_setTimerValue(&MODULE_GPT120, RELOAD_VALUE_T3);
IfxCpu_enableInterrupts();
}

This one data transfer and receive function through uart
extern void send_receive_ASCLIN_UART_message(void)
{

IfxAsclin_Asc_write(&g_ascHandle, g_txData, &g_count, TIME_INFINITE); /* Transmit data via TX */
IfxAsclin_Asc_read(&g_ascHandle, g_rxData, &g_count, TIME_INFINITE); /* Receive data via RX */
}

Hi infineon

As the title said, I got a problem with "Vddk", I use the next formula to configure "Vddk", but some products(not all, same program) will exceed the threshold(±2%) when ambient temperature increasing, and the calculated value close to low boundary? Could you give me some advise? Thanks

We have been working on debugging an issue where the TC29x Ethernet receiver halts after being saturated with messages and the Ethernet module must be restarted for the receiver to continue receiving messages. We have seen this behavior on two of our designs and on the TC2X9 Triboard. In debug mode the Receive Watchdog Timeout bit causes an interrupt and data corruption is seen when reviewing the Rx buffers. This eventually leads to the receiver halting, no longer receiving any messages and the missed FIFO counter being filled with the missed messages. We are trying to determine the root cause of the data corruption and the halting of the receiver. Any help on this would be greatly appreciated.

Note, with our current test configuration we have also seen that disabling the "Automatic Pad or CRC Stripping" and "CRC Stripping of Type FRAMES" in the MAC configuration prevents the receiver from halting, but we would like to know the root cause of this issue.

hi

i want to use the SCR in order to reduce the power consumption , and meet some block point. please check state flow bellowing :

if SW switch to SCR domain to execute, which position will sw execute next after wake up source login and exit from SCR domain ?

Step A (step A as the SW first code after reset  )?  or back to Step B?