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vishal
Jan 21st, 2013, 07:50 AM
Hi...I am trying to configure DMA channel 0 to read from GTCXR11 register and update the data in to a dpram location D0002000 as a circular buffer of 50 locations(32 bit per location).
The trigger for DMA channel 0 is via hardware signal IR9, via some LTC trigger sources. I see that the DMA0.DADR register is incremented to consecutive locations after each trigger, but cannot see any values from GPTAXR11 register getting stored in to the DPRAM destination address. The destination address always shows value of 0.

I have configured the DMA read from the GPTA registers by cnfiguring M0EANR register etc, but it is not working...i m held up with this issue for past 1 week....do not know what is the problem...any clues/help is greatly appreciated.........

vaibhav
Aug 30th, 2013, 05:27 AM
Sorry for replying late, newly joined Just a Hint,
You need to enable DMI (DataScratch SRAM) AEN30 because you will be writing data on DP Ram location as you already mentioned. This allow DMA Move engine to do a Move operation. Along with enabling AEN30 you need to define the ADDRESS Ranage Protection register for DMI. best way to do that is by enabling it for all memory area of DSRAM. You can access these register only using MAIN_vResetENDINIT and MAIN_vSetENDINIT as these registers are ENDINIT protected.
Hope this helps, Its just a hint, this will help you understand the DMA logic better.