Continuous use of DMA channel

[#1]

Hi,

I am using the DMA to Transfer some data triggered by the ADC peripheral.
It is running. After a Transfer the channel enable bit is cleared. Thus it is needed to activate the DMA channel once again when it is needed next time.

// => Enable DMA0 channel 3
GPDMA0->CHENREG |= 0x101U << 3;

The goal will be to use the DMA channel continuously without activating the DMA channel after every Transfer.

Thanks for your remarks!

[Travis]

BeGu wrote:
Hi,

I am using the DMA to Transfer some data triggered by the ADC peripheral.
It is running. After a Transfer the channel enable bit is cleared. Thus it is needed to activate the DMA channel once again when it is needed next time.

// => Enable DMA0 channel 3
GPDMA0->CHENREG |= 0x101U << 3;

The goal will be to use the DMA channel continuously without activating the DMA channel after every Transfer.

Thanks for your remarks!

Hi BeGu,

I think this will be more suitable for your application.

http://www.infineonforums.com/threads/1739-XMC_HOT-XMC4500-How-to-do-Multi-BLK-DMA-transfer-%28SRC-A...

Best Regards
Travis

[#3]

Hi Travis,

thanks for your idea!
I will Need three channels working in this way. As far as I know only channel 0 and 1 of DMA0 can be used in this way.
Isn't there any possibility to activate a channel only once and leave it activated? I don't want that the HW disables the channel.

Regards

[Travis]

Hi BeGu,

I think you might need only one DMA channel as you can make use of the Gather mode. (see attach example)

Please monitor the destination

This example demonstrate the following
1) transfer of 32bit data from source to destination. (You can take the source address as your ADC result register)
2) Offset by 4x32bit data from previous source address (You can calculate the offset of the next ADC result register)
3) Repeat from step 1 until interrupt generated after 3x 32bit data had been transferred to the destination.



Lastly please set transfer type to "Single Block Transfer" as I forgot to change this.